Resistive switching random access memory (RRAM) has become a popular candidate for next generation non-volatile memories.^[1–4] To achieve high density and large capacity for resistive memories, crossbar array architecture is introduced for memory circuit design.^[5,6] However, the parasitic leakage paths through unselected cells limit the array size and increase power consumption in operating a crossbar array. To suppress a sneak path current, the selector devices are usually added in series with a resistive memory device, constituting an 1S1R structure.^[7,8] Threshold switching (TS) selectors based on metal filament have attracted much attention due to its large ON/OFF ratio, low leakage current, and compatibility with CMOS process.^[9] As an important part of 1S1R structure, selector parameters have great effects on 1S1R array performance. Many studies^[10–12] have investigated the impact of the selector characteristics on the performance of 1S1R arrays. But most of them assume that the selector is ideal. In fact, because of the non-uniformity existing in filament set-up process, the selectorʼs characteristics may have a large variation. For example, threshold voltage (V_th) and hold voltage (V_hold) always have a non-negligible variation in the range of hundreds of mV. The variation in TS selectors potentially introduces serious problems to the arrayʼs operation, such as the increase in power consumption and high bit error rate (BER).

To investigate the impact of voltage variations of threshold switching selectors in 1S1R crossbar array, in this work—based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors—the variations of V_th and V_hold are expressed to evaluate the impact on the performance parameters from a 32 × 32 1S1R crossbar array.

The statistics and expressions of variations of V_th and V_hold of TS selectors are obtained based on measurement results of the Ag-filament TS selectors fabricated by our group.^[13] Figure 1(a) shows the measured I–V curves for numerous TS selectors under switching cycles. These devices have enhanced the performance of high selectivity by more than 10⁸ and high ON-state current by greater than 100 μA. The variation of V_th and V_hold of selectors can be observed.

Fig. 1.

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	Fig. 1. (color online) I–V curves of the TS selector: (a) test results and (b) numerical results of the expressions.

The variation of V_th and V_hold can be modeled by the normal distribution functions 1 2

Figure 1(b) shows the numerical results of the two normal distribution functions based on statistical distribution. We can see that the normal distributions of V_th and V_hold reflect real variation of V_th and V_hold of TS selector samples. In the next section, two models in conjunction with ohmic behaviors of the OFF-state and ON-state current are utilized to evaluate the impact on read and write process in 32 × 32 1S1R crossbar array under different schemes with MATLAB. During the MATLAB processing, the TS selectors are set to the OFF-state or ON-state, which is triggered by the comparison between applying voltage and V_th or V_hold. A selector and an RRAM in series are connected to wordline and bitline of the crossbar array, respectively. All of the paths current and nodes voltage in the crossbar array can be calculated based on Kirchhoffʼs law. Furthermore, the 1S1R arrayʼs performance parameters, such as power consumption and BER, can be evaluated based on the pathʼs current and the nodeʼs voltage.

Figure 2 shows the effect of variation of V_hold on minimum read voltage (V_{read_min}) under different schemes during the read process. A 0.02 V variation of V_hold from 0.03 V to 0.05 V can give rise to over 0.1 V increase of V_{read_ min}. The reason is that with the increase of V_hold, a larger applied voltage of selector is needed to keep the selector in the ON-state. Consequently, the read voltage is increased due to the increase of V_hold. There is an insignificant difference in V_{read_min} for the array under difference bias scheme because most of the voltage drop is taken on by the RRAM device when the selector is set to ON-state.

Fig. 2.

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	Fig. 2. (color online) Vread_min with the variation of Vhold for 1S1R crossbar array under different bias schemes.

The BER of a 32 × 32 array with the variation of V_hold and V_th is shown in Fig. 3 at V_read =0.3 V and the array under floating scheme. As shown in Fig. 3(a), when the mean value of V_hold increases by only 0.03 V from 0.01 V to 0.04 V with the standard deviation of 0.017 V, the BER increases by two orders of magnitude. Meanwhile, as V_hold standard deviation increases from 0.002 V to 0.01 V with the mean value of V_hold of 0.038 V, the BER rises greatly, as shown in Fig. 3(b). Under a certain read voltage and standard deviation of V_hold, the increase of the mean value of V_hold will lead to more selectors under the OFF-state and the BER will increase. In another case, when the standard deviation of V_hold increases under a certain read voltage and V_hold mean value, V_hold distribution has a wider range. Therefore, more selectors are triggered to the OFF-state and this will result in serious degradation of the BER. Compared to the mean value of V_hold, the standard deviation of V_hold has more serious degradation on BER. The variation of V_th also degrades the BER, as shown in Figs. 3(c) and 3(d). However, the impact of V_th on BER is less than that of V_hold. This happens because the BER mainly depends on the variation of V_hold when V_read is large enough to make the selected cell stay in ON-state.

Fig. 3.

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	Fig. 3. (color online) BER versus (a) Vhold, (b) standard deviation of Vhold, (c) Vth, and (d) standard deviation of Vth.

Figure 4 show the effect of standard deviation of V_th on power consumption and power efficiency under different bias schemes and V_th= 0.18 V during read process. Power is the total power consumption of the crossbar array, which can be calculated by multiplying V_read and the sum of output current, and power efficiency can be obtained by the ratio of the power of selected cell to total power. As the standard deviation of V_th increases, the power consumption increases and the power efficiency decreases. The comparison among under different bias schemes reveals that as the standard deviation increases, 1/2 bias tends to result in drastic degradation of power consumption and power efficiency than that in cases of 1/3 bias and floating scheme. For the effect of standard deviation of V_hold on power consumption and power efficiency, when the variation of V_hold makes BER remain at low level, the cells have less opportunity to be mis-operated. Consequently, V_hold has a small impact on power consumption and power efficiency of the crossbar array, and the power consumption and power efficiency are mainly influenced by the variation of V_th.

Fig. 4.

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	Fig. 4. (color online) The effect of standard deviation of Vth on (a) power consumption and (b) power efficiency under different bias schemes.

Figure 5 shows V_{write_min} with a variation of V_hold for 1S1R array under different bias scheme during write process. V_{write_min} also increases with a variation of V_hold from a small to a large value. This happens because a larger voltage drop of the selector is needed to keep the selector in the ON-state with the an increase of V_hold. Therefore, the write voltage is increased due to the increase of V_hold. It is observed that V_{write_min} in the 1/2 bias scheme is larger than the write voltage in 1/3 bias scheme. The reason for this is that under 1/2 bias scheme, write voltage is larger in unselected cells, which will cause more leakage current. Thus, a larger voltage is needed to compensate the required voltage for switching a RRAM device, which results in high V_{write_min}. Therefore, the performance is degraded due to the variation of V_hold.

Fig. 5.

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	Fig. 5. (color online) Vwrite_min with the variation of Vhold for 1S1R array under different bias scheme.

Figure 6 depicts the impact of the variation of V_th standard deviation on power consumption and power efficiency, where the mean value of V_th is 0.7 V to ensure that the unselected cells keep in OFF-state. Power is the total power consumption of crossbar array which can be calculated by multiplying V_write and the sum of output current, and power efficiency can be obtained by the ratio of the power of selected cell to total power. As the standard deviation of V_th increases, the power consumption increases and the power efficiency decreases. When the standard deviation of V_th increases from 8 mV to 50 mV, the power consumption increases by more than two orders of magnitude, as shown in Fig. 6(a), and the power efficiency decreases by 93%, as shown in Fig. 6(b). This happens because the increases of standard deviation mean that more unselected cells are unexpectedly turned on. Consequently, the power consumption increases and the power efficiency decreases markedly. Therefore, the performance is degraded due to the large standard deviation of V_th.

Fig. 6.

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	Fig. 6. (color online) The effect of the standard deviation of Vth on (a) power consumption and (b) power efficiency.

The impact of variability of threshold voltage (V_th) and hold voltage (V_hold) of selectors in a 1S1R crossbar array is investigated. For the read process, as V_hold varies from small to large value, the minimum read voltage increases. As the mean value of V_hold and standard deviation of V_hold increase, the performance of BER degrades drastically, and a small increase of V_th standard deviation leads to a rapid decline of power efficiency. Furthermore, the case under 1/2 bias tends to become most serious. During the write process, a small increase of V_hold can cause a large degradation of the minimum write voltage. With a slight increase of V_th standard deviation, there is a marked decrease in write power efficiency and an increase in write power consumption. These results indicate that V_th and V_hold variations of TS selector can degrade the performances of 1S1R array seriously, such as minimum read/write voltage, BER, and power consumption. This paper has significance because it helps us to properly understand the impacts of voltage variation and the design of the selector.